Productivity Gains through Re-Use and Quality Improvements of HW
Models
Second Workshop on Libraries Component Modeling and Quality Assurance
(WLMQA'97)
Toledo (Spain).
April 23-25, 1997.
ABSTRACT
Industrial design flows for HW and mixed (HW/SW) applications increasingly
exploit re-use of HW models and libraries of complex, quality proven
components to increase productivity and decrease time to market. In this
paper we analyze the concept of productivity and underline the existing
links with various design parameters, focusing on reħ use and quality
of models. Some theoretical models are introduced to quantify HW model re-use.
These are used to provide guidelines to support decision making. Then we
analyze heuristic techniques through which designers currently apply HW model
re-use in both VHDL and Verilog based design environments. Finally we show
how REQUEST Project complies with the industrial requirements and generalizes
the experience of designers proposing solutions for quality improvements and
design re-use. Some conclusions will provide hints on future activities of the
project.
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Related files:
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![[Paper (PDF)]](pdficon.gif) |
lcmq97.pdf |
Paper (Adobe Acrobat Portable Document Format PDF) |
![[Slides (PDF)]](pproject.gif) |
lcmq97pp.pdf |
Presentation Slides (PDF) |
Copyright note:
Copyright © 1997 SIG-VHDL and the Univerity of Cantabria.
All rights reserved. No part of this publication may be reproduced without the
written permission of the SIG-VHDL or the University of Cantabria.
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